ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 7-1
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Chapter 7
Level 2 Memory System
This chapter describes the L2 memory system. It contains the following sections:
• About the L2 memory system on page 7-2.
• Snoop Control Unit on page 7-3.
• ACE master interface on page 7-6.
• CHI master interface on page 7-13.
• Additional memory attributes on page 7-17.
• Optional integrated L2 cache on page 7-18.
• ACP on page 7-19.
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