Debug
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 11-11
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11.4.2 Debug Watchpoint Control Registers, EL1
The DBGWCRn_EL1characteristics are:
Purpose Holds control information for a watchpoint. Each DBGWCR_EL1 is
associated with a DBGWVR_EL1 to form a Watchpoint Register Pair
(WRP). DBGWCRn_EL1 is associated with DBGWVRn_EL1 to form
WRPn.
The range of n for DBGBCRn_EL1 is 0 to 3.
Usage constraints These registers are accessible as follows:
Configurations The DBGWCRn_EL1 is architecturally mapped to:
• The AArch32 DBGWCRn registers.
• The external DBGWCRn_EL1 registers.
Attributes See the register summary in Table 11-3 on page 11-6.
The debug logic reset value of a DBGWCR_EL1 is
UNKNOWN.
Figure 11-3 shows the DBGWCRn_EL1 bit assignments.
Figure 11-3 DBGWCRn_EL1 bit assignments
Table 11-5 shows the DBGWCRn_EL1 bit assignments.
EL0
EL1
(NS)
EL1
(S)
EL2
EL3
(SCR.NS = 1)
EL3
(SCR.NS = 0)
- RW RWRWRW RW
BAS
31 29 28 24 23 21 20 19 16 15 14 13 12 5 4 3 2 1 0
RES
0
WT
SSC LSCMASK LBN
HMC
PAC
RES
0E
Table 11-5 DBGWCRn_EL1 bit assignments
Bits Name Function
[31:29] - Reserved,
RES0.
[28:24] MASK Address range mask. The processor supports watchpoint address range masking. This field can set a watchpoint
on a range of addresses by masking lower order address bits out of the watchpoint comparison. The value of this
field is the number of low order bits of the address that are masked off, except that values of 1 and 2 are reserved.
See the ARM
®
Architecture Reference Manual ARMv8, for ARMv8-A architecture profile for the meanings of
watchpoint address range mask values.
[23:21] - Reserved,
RES0.
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