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ARM Cortex-A53 MPCore
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Debug
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 11-20
ID021414 Non-Confidential
Figure 11-7 DBGDEVID1 bit assignments
Table 11-10 shows the DBGDEVID1 bit assignments.
To access the DBGDEVID1 in AArch32 Execution state, read the CP14 register with:
MRC p14, 0, <Rt>, c7, c1, 47 Read Debug Device ID Register 1
RES0
31 0
PCSROffset
43
Table 11-10 DBGDEVID1 bit assignments
Bits Name Function
[31:4] - Reserved,
RES0.
[3:0] - Indicates the offset applied to PC samples returned by reads of EDPCSR. The value is:
0x2
EDPCSR samples have no offset applied and do not sample the instruction set state in the AArch32
state.

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