ARM Cortex-A53 MPCore - Page 424

Debug
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 11-22
ID021414 Non-Confidential
0x40C - - - Reserved
0x410 DBGBVR1_EL1[31:0] RW 64 Debug Breakpoint Value Register 1
0x414 DBGBVR1_EL1[63:32]
0x418 DBGBCR1_EL1 RW 32 Debug Breakpoint Control Registers, EL1 on page 11-8
0x41C - - - Reserved
0x420 DBGBVR2_EL1[31:0] RW 64 Debug Breakpoint Value Register 2
0x424 DBGBVR2_EL1[63:32]
0x428 DBGBCR2_EL1 RW 32 Debug Breakpoint Control Registers, EL1 on page 11-8
0x42C - - - Reserved
0x430 DBGBVR3_EL1[31:0] RW 64 Debug Breakpoint Value Register 3
0x434 DBGBVR3_EL1[63:32]
0x438 DBGBCR3_EL1 RW 32 Debug Breakpoint Control Registers, EL1 on page 11-8
0x43C - - - Reserved
0x440 DBGBVR4_EL1[31:0] RW 64 Debug Breakpoint Value Register 4
0x444 DBGBVR4_EL1[63:32]
0x448 DBGBCR4_EL1 RW 32 Debug Breakpoint Control Registers, EL1 on page 11-8
0x44C --Reserved
0x450 DBGBVR5_EL1[31:0] RW 64 Debug Breakpoint Value Register 5
0x454 DBGBVR5_EL1[63:32]
0x458 DBGBCR5_EL1 RW 32 Debug Breakpoint Control Registers, EL1 on page 11-8
0x45C-0x7FC - - - Reserved
0x800 DBGWVR0_EL1[31:0] RW 64 Debug Watchpoint Value Register 0
0x804 DBGWVR0_EL1[63:32]
0x808 DBGWCR0_EL1 RW 32 Debug Watchpoint Control Registers, EL1 on page 11-11
0x80C - - - Reserved
0x810 DBGWVR1_EL1[31:0] RW 64 Debug Watchpoint Value Register 1
0x814 DBGWVR1_EL1[63:32]
0x818 DBGWCR1_EL1 RW 32 Debug Watchpoint Control Registers, EL1 on page 11-11
0x81C - - - Reserved
0x820 DBGWVR2_EL1[31:0] RW 64 Debug Watchpoint Value Register 2
0x824 DBGWVR2_EL1[63:32]
0x828 DBGWCR2_EL1 RW 32 Debug Watchpoint Control Registers, EL1 on page 11-11
0x82C - - - Reserved
Table 11-11 Memory-mapped debug register summary (continued)
Offset Name Type Width Description