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ARM Cortex-A53 MPCore - Page 433

ARM Cortex-A53 MPCore
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Debug
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 11-31
ID021414 Non-Confidential
Peripheral Identification Register 4
The EDPIDR4 characteristics are:
Purpose Provides information to identify an external debug component.
Usage constraints This register is accessible as follows:
Table 11-1 on page 11-5 describes the condition codes.
Configurations The EDPIDR4 is in the Debug power domain.
Attributes See the register summary in Table 11-11 on page 11-21.
Figure 11-15 shows the EDPIDR4 bit assignments.
Figure 11-15 EDPIDR4 bit assignments
Table 11-20 shows the EDPIDR4 bit assignments.
The EDPIDR4 can be accessed through the internal memory-mapped interface and the external
debug interface, offset
0xFD0
.
Peripheral Identification Register 5-7
No information is held in the Peripheral ID5, Peripheral ID6 and Peripheral ID7 Registers. They
are reserved for future use and are
RES0.
Off DLK OSLK EDAD SLK Default
-- - - - RO
RES0
31 0
34
DES_2
78
Size
Table 11-20 EDPIDR4 bit assignments
Bits Name Function
[31:8] - Reserved,
RES0.
[7:4] Size
0x0
Size of the component. Log2 the number of 4KB pages from the start of the component to the end
of the component ID registers.
[3:0] DES_2
0x4
ARM Limited. This is the least significant nibble JEP106 continuation code.

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