Debug
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 11-38
ID021414 Non-Confidential
Table 11-27 shows the address mapping for the Cortex-A53 processor debug APB components
when configured for v7 Debug memory map.
0x030000
-
0x030FFF
CPU 0 PMU
0x040000
-
0x040FFF
CPU 0 Trace
0x041000
-
0x10FFFF
Reserved
0x110000
-
0x110FFF
CPU 1 Debug
0x120000
-
0x120FFF
CPU 1 CTI
0x130000
-
0x130FFF
CPU 1 PMU
0x140000
-
0x140FFF
CPU 1 Trace
0x141000
-
0x20FFFF
Reserved
0x210000
-
0x210FFF
CPU 2 Debug
0x220000
-
0x220FFF
CPU 2 CTI
0x230000
-
0x230FFF
CPU 2 PMU
0x240000
-
0x240FFF
CPU 2 Trace
0x241000
-
0x30FFFF
Reserved
0x310000
-
0x310FFF
CPU 3 Debug
0x320000
-
0x320FFF
CPU 3 CTI
0x330000
-
0x330FFF
CPU 3 PMU
0x340000
-
0x340FFF
CPU 3 Trace
0x341000
-
0x3FFFFF
Reserved
a. Indicates the mapped component if present, otherwise
reserved.
Table 11-27 Address mapping for APB components
Address offset [21:0]
Component
a
0x00000
-
0x00FFF
Cortex-A53 APB ROM table
0x01000
-
0x07FFF
Reserved for other debug components
0x08000
-
0x0FFFF
Reserved for future expansion
0x01000
-
0x10FFF
CPU 0 Debug
0x11000
-
0x11FFF
CPU 0 PMU
0x12000
-
0x12FFF
CPU 1 Debug
0x13000
-
0x13FFF
CPU 1 PMU
0x14000
-
0x14FFF
CPU 2 Debug
0x15000
-
0x15FFF
CPU 2 PMU
Table 11-26 Address mapping for APB components (continued)
Address offset [21:0]
Component
a
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