Performance Monitor Unit
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 12-13
ID021414 Non-Confidential
To access the PMCEID1_EL0:
MRS <Xt>, PMCEID1_EL0; Read Performance Monitor Common Event Identification Register 0
The PMCEID1_EL0 can be accessed through the internal memory-mapped interface and the
external debug interface, offset
0xE24
.
Table 12-8 PMU common events
Bit Event number Event mnemonic Description
[0]
0x20
L2D_CACHE_ALLOCATE
0
This event is not implemented.
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