Embedded Trace Macrocell
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 13-15
ID021414 Non-Confidential
Table 13-6 shows the TRCCONFIGR bit assignments.
The TRCCONFIGR can be accessed through the internal memory-mapped interface and the
external debug interface, offset
0x010
.
13.8.4 Branch Broadcast Control Register
The TRCBBCTLR characteristics are:
Purpose Controls how branch broadcasting behaves, and enables branch
broadcasting to be enabled for certain memory regions.
Usage constraints • Only accepts writes when the trace unit is disabled.
• Must be programmed if TRCCONFIGR.BB == 1.
Configurations Available in all configurations.
Attributes See the register summary in Table 13-3 on page 13-10.
Figure 13-6 on page 13-16 shows the TRCBBCTLR bit assignments.
Table 13-6 TRCCONFIGR bit assignments
Bits Name Function
[31:13] - Reserved,
RES0.
[12] RS Enables the return stack. The possible values are:
0
Disables the return stack.
1
Enables the return stack.
[11] TS Enables global timestamp tracing. The possible values are:
0
Disables global timestamp tracing.
1
Enables global timestamp tracing.
[10:8] - Reserved,
RES0.
[7] VMID Enables VMID tracing. The possible values are:
0
Disables VMID tracing.
1
Enables VMID tracing.
[6] CID Enables context ID tracing. The possible values are:
0
Disables context ID tracing.
1
Enables context ID tracing.
[5] - Reserved,
RES0.
[4] CCI Enables cycle counting instruction trace. The possible values are:
0
Disables cycle counting instruction trace.
1
Enables cycle counting instruction trace.
[3] BB Enables branch broadcast mode. The possible values are:
0
Disables branch broadcast mode.
1
Enables branch broadcast mode.
[2:1] - Reserved,
RES0.
[0] - Reserved,
RES1.
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