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ARM Cortex-A53 MPCore - Page 532

ARM Cortex-A53 MPCore
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Embedded Trace Macrocell
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 13-37
ID021414 Non-Confidential
Figure 13-30 TRCIDR12 bit assignments
Table 13-31 shows the TRCIDR12 bit assignments.
The TRCIDR12 can be accessed through the internal memory-mapped interface and the
external debug interface, offset
0x190
.
13.8.29 ID Register 13
The TRCIDR13 characteristics are:
Purpose Returns the number of special conditional instruction right-hand keys that
the trace unit can use.
Usage constraints There are no usage constraints.
Configurations Available in all configurations.
Attributes See the register summary in Table 13-3 on page 13-10.
Figure 13-31 shows the TRCIDR13 bit assignments.
Figure 13-31 TRCIDR13 bit assignments
Table 13-32 shows the TRCIDR13 bit assignments.
The TRCIDR13 can be accessed through the internal memory-mapped interface and the
external debug interface, offset
0x194
.
31 0
NUMCONDKEY
Table 13-31 TRCID12 bit assignments
Bits Name Function
[31:0] NUMCONDKEY The number of conditional instruction right-hand keys that the trace unit can use, including normal and
special keys.
0
Number of conditional instruction right-hand keys.
31 0
NUMCONDSPC
Table 13-32 TRCID13 bit assignments
Bits Name Function
[31:0] NUMCONDSPC The number of special conditional instruction right-hand keys that the trace unit can use, including
normal and special keys.
0
Number of special conditional instruction right-hand keys.

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