ARM Cortex-A53 MPCore - Page 549

Embedded Trace Macrocell
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 13-54
ID021414 Non-Confidential
13.8.46 Context ID Comparator Value Register 0
The TRCCIDCVR0 characteristics are:
Purpose Contains a Context ID value.
Usage constraints Accepts writes only when the trace unit is disabled.
Configurations Available in all configurations.
Attributes See the register summary in Table 13-3 on page 13-10.
Figure 13-48 shows the TRCCIDCVR0 bit assignments.
Figure 13-48 TRCCIDCVR0 bit assignments
Table 13-49 shows the TRCCIDCVR0 bit assignments.
The TRCCIDCVR0 can be accessed through the internal memory-mapped interface and the
external debug interface, offset
0x600 .
13.8.47 VMID Comparator Value Register 0
The TRCVMIDCVR0 characteristics are:
Purpose Contains a VMID value.
Usage constraints Accepts writes only when the trace unit is disabled.
Configurations Available in all configurations.
Attributes See the register summary in Table 13-3 on page 13-10.
Figure 13-49 shows the TRCVMIDCVR0 bit assignments.
Figure 13-49 TRCVMIDCVR0 bit assignments
63 0
Context ID Value
31
RES
0
32
Table 13-49 TRCCIDCVR0 bit assignments
Bits Name Function
[63:32] - Reserved,
RES0.
[31:0] VALUE The data value to compare against
63 0
VALUE
RES
0
87