Cross Trigger
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 14-17
ID021414 Non-Confidential
CTICIDR2 can be accessed through the internal memory-mapped interface and the external
debug interface, offset
0xFF8
.
Component Identification Register 3
The CTICIDR3 characteristics are:
Purpose Provides information to identify a CTI component.
Usage constraints The accessibility of CTICIDR3 by condition code is:
Table 14-4 on page 14-7 describes the condition codes.
Configurations CTICIDR3 is in the Debug power domain.
CTICIDR3 is optional to implement in the external register interface.
Attributes See the register summary in Table 14-3 on page 14-5.
Figure 14-12 shows the CTICIDR3 bit assignments.
Figure 14-12 CTICIDR3 bit assignments
Table 14-18 shows the CTICIDR3 bit assignments.
CTICIDR3 can be accessed through the internal memory-mapped interface and the external
debug interface, offset
0xFFC
.
Off DLK OSLK EPMAD SLK Default
- - - - RO RO
To Next Page
Loading...
