ARM Cortex A9 User Manual

Debug
ARM DDI 0388I Copyright © 2008-2012 ARM. All rights reserved. 10-2
ID073015 Non-Confidential
10.1 Debug Systems
The Cortex-A9 processor is one component of a debug system. Figure 10-1 shows a typical
system.
Figure 10-1 Typical debug system
This typical system has three parts:
• Debug host
• Protocol converter
• Debug target.
10.1.1 Debug host
The debug host is a computer, for example a personal computer, running a software debugger
such as RealView Debugger. The debug host enables you to issue high-level commands such as
setting a breakpoint at a certain location or examining the contents of a memory address.
10.1.2 Protocol converter
The debug host connects to the processor development system using an interface such as
Ethernet. The messages broadcast over this connection must be converted to the interface
signals of the debug target. A protocol converter performs this function, for example, RealView
ICE.
10.1.3 Debug target
The debug target is the lowest level of the system. An example of a debug target is a
development system with a Cortex-A9 test chip or a silicon part with a Cortex-A9 processor.
The debug target must implement some system support for the protocol converter to access the
processor debug unit using the Advanced Peripheral Bus (APB) slave port.
Host computer running RealView Debugger
Debug
host
for example, RealView ICE
Development system containing ARM processor
Debug
target
Protocol
converter

ARM Cortex A9 Specifications

General

Architecture	ARMv7-A
Cores	1-4
SIMD Extensions	NEON
ISA	ARM
Microarchitecture	Cortex-A9
Instruction Width	32-bit
Data Width	32-bit
MMU	Yes
Instruction Set	ARMv7-A
Clock Speed	Up to 2 GHz
L1 Cache	32 KB Instruction, 32 KB Data (per core)
Process Technology	40 nm, 28 nm
Floating Point Unit	VFPv3
Pipeline Depth	8 stages
Power Consumption	Low power design