ARM Cortex A9 User Manual

Level 1 Memory System
ARM DDI 0388I Copyright © 2008-2012 ARM. All rights reserved. 7-10
ID073015 Non-Confidential
7.5 About DSB
The Cortex-A9 processor only implements the SY option of the DSB instruction. All other DSB
options execute as a full system DSB operation, but software must not rely on this operation.

ARM Cortex A9 Specifications

General

Architecture	ARMv7-A
Cores	1-4
SIMD Extensions	NEON
ISA	ARM
Microarchitecture	Cortex-A9
Instruction Width	32-bit
Data Width	32-bit
MMU	Yes
Instruction Set	ARMv7-A
Clock Speed	Up to 2 GHz
L1 Cache	32 KB Instruction, 32 KB Data (per core)
Process Technology	40 nm, 28 nm
Floating Point Unit	VFPv3
Pipeline Depth	8 stages
Power Consumption	Low power design