ARM Cortex A9 User Manual

Signal Descriptions
ARM DDI 0388I Copyright © 2008-2012 ARM. All rights reserved. A-21
ID073015 Non-Confidential
A.13 External Debug interface
The following sections describe the external debug interface signals:
• Authentication interface
• APB interface signals on page A-22
• CTI signals on page A-22
• Miscellaneous debug interface signals on page A-23.
A.13.1 Authentication interface
Table A-25 shows the authentication interface signals.
Table A-25 Authentication interface signals
Name I/O Source Description
DBGEN I Security controller Invasive debug enable:
0 Not enabled.
1 Enabled.
NIDEN I Non-invasive debug enable:
0 Not enabled.
1 Enabled.
SPIDEN I Secure privileged invasive debug enable:
0 Not enabled.
1 Enabled.
SPNIDEN I Secure privileged non-invasive debug enable:
0 Not enabled.
1 Enabled.

ARM Cortex A9 Specifications

General

Architecture	ARMv7-A
Cores	1-4
SIMD Extensions	NEON
ISA	ARM
Microarchitecture	Cortex-A9
Instruction Width	32-bit
Data Width	32-bit
MMU	Yes
Instruction Set	ARMv7-A
Clock Speed	Up to 2 GHz
L1 Cache	32 KB Instruction, 32 KB Data (per core)
Process Technology	40 nm, 28 nm
Floating Point Unit	VFPv3
Pipeline Depth	8 stages
Power Consumption	Low power design