ARM Cortex A9 - Appendix A Signal Descriptions; Clock Signals; A.1 Clock Signals

Signal Descriptions
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A.1 Clock signals
The Cortex-A9 processor has a single externally generated global clock. Table A-1 shows the
clock and clock control signals.
Table A-1 Clock and clock control signals
Name I/O Source Description
CLK I Clock controller Global clock.
See Clocking and resets on page 2-6.
MAXCLKLATENCY[2:0] I Implementation-specific static value Controls dynamic clock gating delays.
This pin is sampled during reset of the processor.
See Power Control Register on page 4-41.