Cycle Timings and Interlock Behavior
ARM DDI 0388I Copyright © 2008-2012 ARM. All rights reserved. B-8
ID073015 Non-Confidential
B.5 Branch instructions
Branch instructions have different timing characteristics:
• Branch instructions to immediate locations do not consume execution unit cycles.
• Data-processing instructions to the PC register are processed in the execution units as
standard instructions. See Data-processing instructions on page B-3.
• Load instructions to the PC register are processed in the execution units as standard
instructions. See Load and store instructions on page B-4.
See About the L1 instruction side memory system on page 7-5 for information on dynamic
branch prediction.
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