ARM Cortex A9 User Manual

Signal Descriptions
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A.14 PTM interface signals
Table A-29 shows the PTM interface signals. These signals are present only if the PTM
interface is present.
In the I/O column, the I indicates an input from the PTM interface to the Cortex-A9 processor.
The O indicates an output from the Cortex-A9 processor to the PTM. All these signals are in the
Cortex-A9 clock domain.
Table A-29 PTM interface signals
Name I/O
Source or
destination
Description
WPTCOMMIT[1:0] O PTM device Number of waypoints committed in this cycle. It is valid to indicate a valid
waypoint and commit it in the same cycle.
WPTCONTEXTID[31:0] O Context ID for the waypoint.
This signal must be true regardless of the condition code of the waypoint.
If the processor Context ID has not been set, then
WPTCONTEXTID[31:0] must report 0.
WPTENABLE I Enable waypoint.
WPTEXCEPTIONTYPE[3:0] O Exception type:
b0001 Halting debug-mode.
b0010 Secure Monitor.
b0100 Imprecise Data Abort.
b0101 T2EE trap.
b0101 T2EE trap.
b0101 T2EE trap.
b1001 UNDEF.
b1010 SVC.
b1011 Prefetch abort/software breakpoint.
b1100 Precise data abort/software watchpoint.
b1110 IRQ.
b1111 FIQ.
WPTFLUSH O Waypoint flush signal.
WPTLINK O The waypoint is a branch that updates the link register.
Only HIGH if WPTTYPE is a direct branch or an indirect branch.

ARM Cortex A9 Specifications

General

Architecture	ARMv7-A
Cores	1-4
SIMD Extensions	NEON
ISA	ARM
Microarchitecture	Cortex-A9
Instruction Width	32-bit
Data Width	32-bit
MMU	Yes
Instruction Set	ARMv7-A
Clock Speed	Up to 2 GHz
L1 Cache	32 KB Instruction, 32 KB Data (per core)
Process Technology	40 nm, 28 nm
Floating Point Unit	VFPv3
Pipeline Depth	8 stages
Power Consumption	Low power design