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ID073015 Non-Confidential

Chapter 10

Debug

This chapter describes the processor debug unit. This feature assists the development of

application software, operating systems, and hardware. This chapter contains the following

sections:

• Debug Systems on page 10-2

• About the Cortex-A9 debug interface on page 10-3

• Debug register features on page 10-4

• Debug register summary on page 10-5

• Debug register descriptions on page 10-7

• Debug management registers on page 10-13

• Debug events on page 10-15

• External debug interface on page 10-16.

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ARM Cortex A9 Specifications

General

Architecture	ARMv7-A
Cores	1-4
SIMD Extensions	NEON
ISA	ARM
Microarchitecture	Cortex-A9
Instruction Width	32-bit
Data Width	32-bit
MMU	Yes
Instruction Set	ARMv7-A
Clock Speed	Up to 2 GHz
L1 Cache	32 KB Instruction, 32 KB Data (per core)
Process Technology	40 nm, 28 nm
Floating Point Unit	VFPv3
Pipeline Depth	8 stages
Power Consumption	Low power design