ARM Cortex A9 User Manual

Debug
ARM DDI 0388I Copyright © 2008-2012 ARM. All rights reserved. 10-15
ID073015 Non-Confidential
10.7 Debug events
A debug event can be either:
• a software debug event
• a halting debug event.
A processor responds to a debug event in one of the following ways:
• ignores the debug event
• takes a debug exception
• enters debug state.
This section describes debug events in:
• Watchpoints
• Asynchronous aborts.
10.7.1 Watchpoints
A watchpoint event is always synchronous. It has the same behavior as a synchronous data
abort. The method of debug entry, DBGDSCR[5:2], never has the value b0010.
If a synchronous abort occurs on a watchpointed access, the synchronous abort takes priority
over the watchpoint.
If the abort is asynchronous and cannot be associated with the access, the exception that is taken
is
UNPREDICTABLE.
Cache maintenance operations do not generate watchpoint events.
10.7.2 Asynchronous aborts
The Cortex-A9 processor ensures that all possible outstanding asynchronous data aborts are
recognized prior to entry to debug state.

ARM Cortex A9 Specifications

General

Architecture	ARMv7-A
Cores	1-4
SIMD Extensions	NEON
ISA	ARM
Microarchitecture	Cortex-A9
Instruction Width	32-bit
Data Width	32-bit
MMU	Yes
Instruction Set	ARMv7-A
Clock Speed	Up to 2 GHz
L1 Cache	32 KB Instruction, 32 KB Data (per core)
Process Technology	40 nm, 28 nm
Floating Point Unit	VFPv3
Pipeline Depth	8 stages
Power Consumption	Low power design