ARM Cortex A9 User Manual

System Control
ARM DDI 0388I Copyright © 2008-2012 ARM. All rights reserved. 4-2
ID073015 Non-Confidential
4.1 About system control
The system control coprocessor, CP15, controls and provides status information for the
functions implemented in the processor. The main functions of the system control coprocessor
are:
• overall system control and configuration
• MMU configuration and management
• cache configuration and management
• system performance monitoring.
4.1.1 Deprecated registers
In ARMv7-A the following have instruction set equivalents:
• Instruction Synchronization Barrier
• Data Synchronization Barrier
• Data Memory Barrier
• Wait for Interrupt.
The use of the registers is optional and deprecated.
In addition, the Fast Context Switch Extensions are deprecated in ARM v7 architecture, and are
not implemented in the Cortex-A9 processor.

ARM Cortex A9 Specifications

General

Architecture	ARMv7-A
Cores	1-4
SIMD Extensions	NEON
ISA	ARM
Microarchitecture	Cortex-A9
Instruction Width	32-bit
Data Width	32-bit
MMU	Yes
Instruction Set	ARMv7-A
Clock Speed	Up to 2 GHz
L1 Cache	32 KB Instruction, 32 KB Data (per core)
Process Technology	40 nm, 28 nm
Floating Point Unit	VFPv3
Pipeline Depth	8 stages
Power Consumption	Low power design