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6 I/O Memory Areas
CJ2 CPU Unit Software User’s Manual
6-19 Index Registers
6
Precautions for Correct UsePrecautions for Correct Use
It is possible to specify regions outside of I/O memory and generate an Illegal Access Error when
indirectly addressing memory with Index Registers. Refer to A-4 Memory Map of PLC Memory
Addresses for details on the limits of PLC memory addresses.
The following table shows the variations available when indirectly addressing I/O memory with Index
Registers.
Note IR@ represents an Index Register from IR0 to IR15.
z Example
This example shows how to store the PLC memory address of a word (CIO 2) in an Index Register
(IR0), use the Index Register in an instruction, and use the auto-increment variation.
Variation Function Syntax Example
Indirect addressing The content of IR@ is treated as the
PLC memory address of a bit or word.
,IR@ LD , IR0 Loads the bit at the PLC memory
address contained in IR0.
Indirect addressing
with constant offset
The constant prefix is added to the
content of IR@ and the result is treated
as the PLC memory address of a bit or
word.
The constant may be any integer from
−2,048 to 2,047.
Constant ,IR@
(Include a + or − in
the constant.)
LD +5, IR0 Adds 5 to the contents of IR0 and
loads the bit at that PLC memory
address.
Indirect addressing
with DR offset
The content of the Data Register is
added to the content of IR@ and the
result is treated as the PLC memory
address of a bit or word.
DR@ , IR@ LD DR0 , IR0 Adds the contents of DR0 to the
contents of IR0 and loads the bit at
that PLC memory address.
Indirect addressing
with auto-increment
After referencing the content of IR@ as
the PLC memory address of a bit or
word, the content is incremented by 1
or 2.
Increment by 1:
, IR@+
Increment by 2:
, IR@++
LD , IR0++ Loads the bit at the PLC memory
address contained in IR0 and then
increments the content of IR0 by 2.
Indirect addressing
with auto-decrement
The content of IR@ is decremented by
1 or 2 and the result is treated as the
PLC memory address of a bit or word.
Decrement by 1:
,− IR@
Decrement by 2:
,− − IR@
LD , − −IR0 Decrements the content of IR0 by 2
and then loads the bit at that PLC
memory address.
MOVR(560) 2 IR0 Stores PLC memory address of CIO 2 in IR0.
MOV(021) #1 ,IR0 Writes #1 to PLC memory address contained in IR0, i.e., to CIO 2.
MOV(021) #20 +1, IR0 Reads IR0, adds 1, and writes #20 to that PLC memory address, i.e., to
CIO 3.
#0001
#0020
Regular
data area
address
I/O memory
PLC memory
address
MOVE TO REGISTER instruction
MOVR(560) 2 IR0
Pointer
0C000 hex
0C001 hex
0C002 hex
0C003 hex
0D7FF hex
0D800 hex
0D9FF hex
0DE00 hex
0DFFF hex
MOV #01 ,IR0
0
1
2
3
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