Appendices
A-82
CJ2 CPU Unit Software User’s Manual
MULTIPLE BIT SET SETA 530 4 3.68 4.12 With 1-bit set
15.5 24.4 With 1,000-bit
set
MULTIPLE BIT RESET RSTA 531 4 3.7 4.1 With 1-bit
reset
15.5 24.4 With 1,000-bit
reset
SINGLE BIT SET SETB 532 2 0.19 0.280 ---
!SETB --- 16 0.99 1.120 ---
SINGLE BIT RESET RSTB 534 2 0.19 0.280 ---
!RSTB --- 16 0.99 1.120 ---
SINGLE BIT OUTPUT OUTB 534 2 0.19 0.280 ---
!OUTB --- 16 0.99 1.180 ---
A-2-3 Sequence Control Instructions
Instruction Mnemonic FUN No.
Length
(steps)
ON execution time (µs)
Conditions
CJ2H
CPU6@(-EIP)
CJ2M-
CPU@@
END END 001 1 2.6 3.5 ---
NO OPERATION NOP 000 1 0.016 0.040 ---
INTERLOCK IL 002 1 0.048 0.060 ---
INTERLOCK CLEAR ILC 003 1 0.048 0.060 ---
MULTI-INTERLOCK
DIFFERENTIATION
HOLD
MILH 517 3 2.3 3.3 Interlock condition
not met (input condi-
tion ON)
3.4 4.6 Interlock condition
met (input condition
OFF)
3.8 5.2 Interlock condition
met again during
interlock (input con-
dition OFF)
MULTI-INTERLOCK
DIFFERENTIATION
RELEASE
MILR 518 3 2.3 3.1 Interlock condition
not met (input condi-
tion ON)
3.4 4.5 Interlock condition
met (input condition
OFF)
3.8 5.1 Interlock condition
met again during
interlock (input con-
dition OFF)
MULTI-INTERLOCK
CLEAR
MILC 519 2 1.2 1.7 Not during interlock
1.6 2.2 During interlock
JUMP JMP 004 2 0.31 0.34 ---
JUMP END JME 005 2 --- --- ---
CONDITIONAL JUMP CJP 510 2 0.31 0.34 Jump condition met
(input condition ON)
Instruction Mnemonic FUN No. Length (steps)
ON execution time (µs)
Conditions
CJ2H
CPU6@(-EIP)
CJ2M-CPU@@