Panasonic MN103S

Chapter 6
ROM Correction
VI - 8 ROM Correction Control Registers
■ ROM Correction 1 Data Register (RCR1DR: 0x7FF00118) [32-bit access register]
bp 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
Flag RC1
DT63
RC1
DT62
RC1
DT61
RC1
DT60
RC1
DT59
RC1
DT58
RC1
DT57
RC1
DT56
RC1
DT55
RC1
DT54
RC1
DT53
RC1
DT52
RC1
DT51
RC1
DT50
RC1
DT49
RC1
DT48
At reset xxxxxxxxxxxxxxxx
Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
bp 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
Flag RC1
DT47
RC1
DT46
RC1
DT45
RC1
DT44
RC1
DT43
RC1
DT42
RC1
DT41
RC1
DT40
RC1
DT39
RC1
DT38
RC1
DT37
RC1
DT36
RC1
DT35
RC1
DT34
RC1
DT33
RC1
DT32
At reset xxxxxxxxxxxxxxxx
Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
bp 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Flag RC1
DT31
RC1
DT30
RC1
DT29
RC1
DT28
RC1
DT27
RC1
DT26
RC1
DT25
RC1
DT24
RC1
DT23
RC1
DT22
RC1
DT21
RC1
DT20
RC1
DT19
RC1
DT18
RC1
DT17
RC1
DT16
At reset xxxxxxxxxxxxxxxx
Access R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/W
bp 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Flag RC1
DT15
RC1
DT14
RC1
DT13
RC1
DT12
RC1
DT11
RC1
DT10
RC1
DT9
RC1
DT8
RC1
DT7
RC1
DT6
RC1
DT5
RC1
DT4
RC1
DT3
RC1
DT2
RC1
DT1
RC1
DT0
At reset xxxxxxxxxxxxxxxx
Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
bp Flag Description Set condition
63-56
RC1DT63
to
RC1DT56
ROM correction 1 correction data Data of the address (lower 3bits set to 7) to be corrected
55-48
RC1DT55
to
RC1DT48
ROM correction 1 correction data Data of the address (lower 3bits set to 6) to be corrected
47-40
RC1DT47
to
RC1DT40
ROM correction 1 correction data Data of the address (lower 3bits set to 5) to be corrected
39-32
RC1DT39
to
RC1DT32
ROM correction 1 correction data Data of the address (lower 3bits set to 4) to be corrected
31-24
RC1DT31
to
RC1DT24
ROM correction 1 correction data Data of the address (lower 3bits set to 3) to be corrected
23-16
RC1DT23
to
RC1DT16
ROM correction 1 correction data Data of the address (lower 3bits set to 2) to be corrected
15-8
RC1DT15
to
RC1DT8
ROM correction 1 correction data Data of the address (lower 3bits set to 1) to be corrected
7-0
RC1DT7
to
RC1DT0
ROM correction 1 correction data Data of the address (lower 3bits set to 0) to be corrected