Panasonic MN103S - Page 472

Chapter 16
Appendix
XVI - 20 Instruction Set
CALL label CALLS (An) CALLS label RET
PC + 7 → mem32(SP),D2→ mem32(SP-4), D3→ mem32(SP-8),A2→ mem32(SP-12),
A3→ mem32(SP-16),D0→ mem32(SP-20),
D1→ mem32(SP-24),A0→ mem32(SP-28), A1→ mem32(SP-32),MDR→ mem32(SP-36), LIR→ mem32(SP-40),LAR→ mem32(SP-44) SP - imm8(zero_ext) → SP,PC + 7 → MDR, PC + d32 → PC PC + 2 → mem32(SP),PC + 2 → MDR, An → PC
IF (label = (d16,PC)), PC + 4 → mem32(SP), PC + 4 → MDR, PC +d16 (sign_ext) → PC IF ((label = (d32,PC)), PC + 6 → mem32(SP), PC + 6 → MDR, PC + d32 → PC SP + imm8(zero_ext) → SP,mem32(SP) → PC SP + imm8(zero_ext) → SP, mem32(SP-4)→ reg, mem32(SP) → PC SP + imm8(zero_ext) → SP, mem32(SP-4)→ reg1,mem32(SP-8)→ reg2,
mem32(SP) → PC SP + imm8(zero_ext) → SP, mem32(SP-4)→ reg1,mem32(SP-8)→ reg2,
mem32(SP-12)→ reg3,mem32(SP) → PC
SP + imm8(zero_ext) → SP, mem32(SP-4)→ D2,mem32(SP-8)→ D3, mem32(SP-12)→ A2,mem32(SP-16)→ A3, mem32(SP) → PC SP + imm8(zero_ext) → SP, mem32(SP-4)→ D0,mem32(SP-8)→ D1, mem32(SP-12)→ A0,mem32(SP-16)→ A1, mem32(SP-20)→ MDR,mem32(SP-24)→ LIR, mem32(SP-28)→ LAR,mem32(SP) → PC SP + imm8(zero_ext) → SP, mem32(SP-4)→ reg1,mem32(SP-8)→ D0,
mem32(SP-12)→ D1,mem32(SP-16)→ A0,
mem32(SP-20)→ A1,mem32(SP-24)→ MDR, mem32(SP-28)→ LIR,mem32(SP-32)→ LAR,
mem32(SP) → PC
- - - - - - - - - - -
- - - - - - - - - - -
- - - - - - - - - - -
- - - - - - - - - - -
7 2 4 6 3 3 3 3 3 3 3
14*
3 3
3* 5* 5* 5* 5*
5 8 9
S6
D0 D2 D4
S2
1 1101 1111 1111 1111 1101
2 1101 0000 1010 1100 1111
3 <d32 1111 1111 1111 <regs
4 .... 00An 1111 1111 ....>
5 .... <d16 <d32 <imm8
6 .... .... .... ....>
Group
Mnemonic
Operation
Machine Code
Notes
Flag
Code Size
Cycle
For -mat
MN1030/MN103S SERIES INSTRUCTION SET
7 .... .... ....
8 .... ....> ....
9 .... ....
10 ....> ....
11 <regs ....
12 ....> ....>
13 <imm8
14 ....>
VF
CF NF
ZF
CALL CALLS RET
If label = (d32,PC), registersspecified with regs =11 *: 5 cycles for AM30 *: 4 cycles for AM30 registers specified with regs =0 *:4 cycles for AM30 registers specified with regs =1 *:4 cycles for AM30 registers specified with regs =2 *:4 cycles for AM30 registers specified with regs =3 *:4 cycles for AM30 registers specified with regs =4 registers specified with regs =7 registers specified with regs =8