Panasonic MN103S - Page 473

Chapter 16
Appendix
Instruction Set XVI - 21
RET RETF
SP + imm8(zero_ext) → SP, mem32(SP-4)→ reg1,mem32(SP-8)→ reg2,
mem32(SP-12)→ D0,mem32(SP-16)→ D1,
mem32(SP-20)→ A0,mem32(SP-24)→ A1, mem32(SP-28)→ MDR,mem32(SP-32)→ LIR, mem32(SP-36)→ LAR,mem32(SP) → PC SP + imm8(zero_ext) → SP, mem32(SP-4)→ reg1,mem32(SP-8)→ reg2,
mem32(SP-12)→ reg3,mem32(SP-16)→ D0, mem32(SP-20)→ D1,mem32(SP-24)→ A0,
mem32(SP-28)→ A1,mem32(SP-32)→ MDR, mem32(SP-36)→ LIR,mem32(SP-40)→ LAR, mem32(SP) → PC
SP + imm8(zero_ext) → SP, mem32(SP-4)→ D2,mem32(SP-8)→ D3, mem32(SP-12)→ A2,mem32(SP-16)→ A3, mem32(SP-20)→ D0,mem32(SP-24)→ D1,
mem32(SP-28)→ A0,mem32(SP-32)→ A1, mem32(SP-36)→ MDR,mem32(SP-40)→ LIR, mem32(SP-44)→ LAR,mem32(SP) → PC SP + imm8(zero_ext) → SP,MDR → PC, SP + imm8(zero_ext) → SP,MDR → PC, mem32(SP-4)→ reg SP + imm8(zero_ext) → SP,MDR → PC, mem32(SP-4)→ reg1,mem32(SP-8)→ reg2,
SP + imm8(zero_ext) → SP,MDR → PC, mem32(SP-4)→ reg1,mem32(SP-8)→ reg2,
mem32(SP-12)→ reg3 SP + imm8(zero_ext) → SP,MDR → PC, mem32(SP-4)→ D2,mem32(SP-8)→ D3, mem32(SP-12)→ A2,mem32(SP-16)→ A3, SP + imm8(zero_ext) → SP,MDR → PC, mem32(SP-4)→ D0,mem32(SP-8)→ D1, mem32(SP-12)→ A0,mem32(SP-16)→ A1, mem32(SP-20)→ MDR,mem32(SP-24)→ LIR, mem32(SP-28)→ LAR SP + imm8(zero_ext) → SP,MDR → PC, mem32(SP-4)→ reg1,mem32(SP-8)→ D0,
mem32(SP-12)→ D1,mem32(SP-16)→ → A0,
mem32(SP-20)→ A1,mem32(SP-24)→ MDR, mem32(SP-28)→ LIR,mem32(SP-32)→ LAR,
- - - - - - - - - -
- - - - - - - - - -
- - - - - - - - - -
- - - - - - - - - -
3 3 3 3 3 3 3 3 3 3
10 11 12
2 2 3 4 5 8 9
S2 S2
1 1101 1101
2 1111 1110
3 <regs <regs
4 ....> ....>
5 <imm8 <imm8
6 ....> ....>
Group
Mnemonic
Operation
Machine Code
Notes
Flag
Code Size
Cycle
For -mat
MN1030/MN103S SERIES INSTRUCTION SET
789
10
11
12
13 14
VF
CF NF
ZF
RET RETF
registers specified with regs = 9 registers specified with regs= 10 registers specified with regs= 11 register specified with regs = 0 register specified with regs= 1 registers specified with regs = 2 registers specified with regs= 3 registers specified with regs= 4 registers specified with regs = 7 registers specified with regs = 8