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Panasonic MN103S
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Chapter 16
Appendix
XVI - 60 Extension Instruction Specification
MACBU (unsigned byte data multiply and accumulate instruction: register to register)
[Instruction format (macro name)]
MACBU Dm, Dn
[Assembler mnemonic]
udf33 Dm, Dn
[Operation]
This instruction performs multiply and accumulate operation by means of the multiplier and the adder provided in
the extension arithmetic unit.
The instruction multiplies the content of Dm (unsigned 8-bit integer: multiplicand) by the content of Dn (unsigned
8-bit integer: multiplier), adds this product to the 32-bit accumulative sum that is stored in the multiply and
accumulate register MCRL and stores the 32-bit result in the multiply and accumulate register MCRL.
The register outputs a multiply and accumulate overflow detection flag ā€œ1ā€ to the register MCVF if the
accumulative sum data overflows beyond 32 bits during addition of the product and the accumulative sum.
[Flag changes]
[Note for programming]
An instruction other than extension instructions that requires 1 or more cycles must be inserted between this
instruction and a next extension instruction.
Flag Change Condition
V-
C-
N-
Z-

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