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Panasonic MN103S - Page 517

Panasonic MN103S
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Chapter 16
Appendix
Extension Instruction Specification XVI - 65
MCST9 (9-bit saturation and positive-valuing instruction for multiply and accumulate result)
[Instruction format (macro name)]
MCST9 Dn, Dn
[Assembler mnemonic]
udf03 Dn, Dn
[Operation]
This instruction stores the positive maximum value (0xff) and “0” (0x00) in Dn respectively when the 32-bit
multiply and accumulate result, stored in the multiply and accumulate register MCRL, is equal to or greater than
the 9-bit signed positive maximum value (0x000000ff) and equal to or smaller than the 32-bit signed negative
value (0x00000000). In any other case, the instruction places the content of the multiply and accumulate overflow
detection flag register MCVF in the V flag.
[Flag changes]
When multiply and accumulate overflow is not detected (MCVF = 0 )
When multiply and accumulate overflow is detected (MCVF = 1 )
[Note for programming]
Updating of the PSW as a result of flag changes is delayed by 1 instruction.
Note, however, that flags can be evaluated for the Bcc and Lcc instructions before flag changes are reflected in the
PSW.
Flag Change Condition
V 0 Indicates that multiply and accumulate operation is valid.
C 0 Always "0".
N * Undefined
Z * Undefined
Flag Change Condition
V 1 Indicates that multiply and accumulate operation is invalid.
C 0 Always "0".
N * Undefined
Z * Undefined

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