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Panasonic MN103S
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Chapter 16
Appendix
XVI - 66 Extension Instruction Specification
MCST48 (48-bit saturation instruction for multiply and accumulate result)
[Instruction format (macro name)]
MCST48 Dn, Dn
[Assembler mnemonic]
udf06 Dn, Dn
[Operation]
This instruction stores the 48-bit signed positive maximum value (0x00007fffffffffffff ) and the negative
maximum value (0xffff 800000000000) in Dn respectively when the 64-bit multiply and accumulate result, stored
in the multiply and accumulate registers MCRH and MCRL, is equal to or greater than the 48-bit positive
maximum value (0x00007fffffffffff ) and equal to or smaller than the negative maximum value
(0xffff800000000000). In any other case, the instruction outputs the contents of MCRH and MCRL and stores the
values of bit 47 to bit 16 of this output in Dn.Additionally, the instruction places the content of the multiply and
accumulate overflow detection flag register MCVF in the V flag.
[Flag changes]
When multiply and accumulate overflow is not detected (MCVF = 0 )
When multiply and accumulate overflow is detected (MCVF = 1 )
[Note for programming]
Updating of the PSW as a result of flag changes is delayed by 1 instruction.
Note, however, that flags can be evaluated for the Bcc and Lcc instructions before flag changes are reflected in the
PSW.
Flag Change Condition
V 0 Indicates that multiply and accumulate operation is valid.
C 0 Always "0".
N * Undefined
Z * Undefined
Flag Change Condition
V 1 Indicates that multiply and accumulate operation is invalid.
C 0 Always "0".
N * Undefined
Z * Undefined

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