Chapter 16
Appendix
XVI - 68 Extension Instruction Specification
SWAP (instruction for bytewise exchange of high-order and low-order bytes of 4-byte data)
[Instruction format (macro name)]
SWAP Dm, Dn
[Assembler mnemonic]
udf08 Dm, Dn
[Operation]
This instruction swaps high-order and low-order 8 bits of each of high-order and low-order 16 bits of the content
of 32-bit data stored in Dm, further swaps high-order and low-order 16 bits and stores the resultant data in Dn.
Bit 32 to bit 24 of Dm are stored in bit 7 to bit 0 of Dn while bit 23 to bit 16 of Dm are stored in bit 15 to bit 8 of
Dn. Bit 15 to bit 8 of Dm are stored in bit 23 to bit 16 of Dn while bit 7 to bit 0 of Dm are stored in bit 32 to bit 24
of Dn.
[Flag changes]
[Note for programming]
Updating of the PSW as a result of flag changes is delayed by 1 instruction.
Note, however, that flags can be evaluated for the Bcc and Lcc instructions before flag changes are reflected in the
PSW.
Flag Change Condition
V * Undefined
C * Undefined
N * Undefined
Z * Undefined
Example of execution
Before execution: 0x12345678
After execution: 0x78563412
Dm before execution
of the instruction
Dn after execution of
the instruction
Bit 31
MSB
Dm [31:24] Dm [23:16] Dm [15:8] Dm [7:0]
Bit 0
LSB
Bit 31
MSB
Dm [7:0] Dm [15:8] Dm [23:16] Dm [31:24]
Bit 0
LSB
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