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Panasonic MN103S - Page 521

Panasonic MN103S
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Chapter 16
Appendix
Extension Instruction Specification XVI - 69
SWAPH (instruction for exchange of high-order and low-order bytes of 2-byte data)
[Instruction format (macro name)]
SWAPH Dm, Dn
[Assembler mnemonic]
udf09 Dm, Dn
[Operation]
This instruction exchanges bit 15 to bit 8 and bit 7 to bit 0 of Dm and also exchanges bit 32 to bit 24 and bit 23 to
bit 16 and then stores the resultant data in Dn.
[Note for programming]
Updating of the PSW as a result of flag changes is delayed by 1 instruction.
Note, however, that flags can be evaluated for the Bcc and Lcc instructions before flag changes are reflected in the
PSW.
Flag Change Condition
V * Undefined
C * Undefined
N * Undefined
Z * Undefined
Example of execution
Before execution : 0x12345678
After execution : 0x34127856
Dm before execution
of the instruction
Dn after execution of
the instruction
Bit 31
MSB
Dm [31:24] Dm [23:16] Dm [15:8] Dm [7:0]
Bit 0
LSB
Bit 31
MSB
Dm [7:0] Dm [15:8]
Dm [23:16] Dm [31:24]
Bit 0
LSB

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