Panasonic MN103S - Page 547

Record of Changes - 10
MN103SA7D/A7G LSI User's Manual Record of Changes from the 1st Edition dated in March, 2005 to the 1st
Edition 1st Printing dated in April, 2006.
Page Section Definition Previous Edition (Ver.1) New Edition (Ver.1.1)
1-8 Line 29 Change
External interrupt 8 pins External interrupt 9 pins
8-18 Table
Set con-
dition
Change TM0BR value is loaded into TM0BC.
Timer output 0 is set to “L” level.
TM0BR value is loaded into TM0BC.
8-24 Table
Set con-
dition
Change TM6BR value is loaded into TM6BC.
Timer output 6 is set to “L” level.
TM6BR value is loaded into TM6BC.
8-26 Table
Set con-
dition
Change TM14BR value is loaded into TM14BC.
Timer output 14is set to “L” level.
TM14BR value is loaded into TM14BC.
8-27 Table
Set con-
dition
Change TM15BR value is loaded into TM15BC.
Timer output 15 is set to “L” level.
TM15BR value is loaded into TM15BC.
8-28 Table
Set con-
dition
Change TM16BR value is loaded into TM16BC.
Timer output 16 is set to “L” level.
TM16BR value is loaded into TM16BC.
8-37 Table
Descrip-
tion (3)
Change ⋅⋅⋅ The setting value is 149 due to
200KHz. ⋅⋅⋅
⋅⋅⋅ The setting value is 149 (0x95)
due to
200KHz. ⋅⋅⋅
9-20 Upper
table
Change 15 14
13 12 11
TMXF -
TMTGE TMONE TMCLE
0 0
0 0 0
R/WR  R/WR/W  
R/W
15 14 13 12 11
TMXF
-
TMTGE TMONE TMCLE
0 0 0 0 1
R R R/W R/W R/W
9-21 Upper
table
Change 15 14
13 12 11
TMXF
-
TMTGE TMONE TMCLE
0 0 0 0 0
R/W R R/W R/W R/W
15 14 13 12 11
TMXF
-
TMTGE TMONE TMCLE
0 0 0 0 1
R R R/W R/W R/W
9-22 Upper
table
Change 15 14
13 12 11
TMXF
-
TMTGE TMONE TMCLE
0 0 0 0 0
R/W R R/W R/W R/W
15 14 13 12 11
TMXF
-
TMTGE TMONE TMCLE
0 0 0 0 1
R R R/W R/W R/W
9-23 Upper
table
Change 15 14
13 12 11
TMXF
-
TMTGE TMONE TMCLE
0 0 0 0 0
R/W R R/W R/W R/W
15 14 13 12 11
TMXF
-
TMTGE TMONE TMCLE
0 0 0 0 1
R R R/W R/W R/W
9-24 Upper
table
Change 15 14
13 12 11
TMXF
-
TMTGE TMONE TMCLE
0 0 0 0 0
R/W R R/W R/W
R/W
15 14
13 12 11
TMXF
-
TMTGE TMONE TMCLE
0 0 0 0 1
R R R/W R/W
R/W