EasyManua.ls Logo

Philips LPC2101 - Page 10

Philips LPC2101
279 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
User manual Rev. 01 — 12 January 2006 10
Philips Semiconductors
UM10161
Volume 1 Chapter 2: Memory map
(to 32-bit boundaries) regardless of their size. This eliminates the need for byte lane
mapping hardware that would be required to allow byte (8-bit) or half-word (16-bit)
accesses to occur at smaller boundaries. An implication of this is that word and half-word
registers must be accessed all at once. For example, it is not possible to read or write the
upper byte of a word register separately.
Fig 4. AHB peripheral map
VECTORED INTERRUPT CONTROLLER
(AHB PERIPHERAL #0)
0xFFFF F000 (4G - 4K)
0xFFFF C000
0xFFFF 8000
(AHB PERIPHERAL #125)
(AHB PERIPHERAL #124)
(AHB PERIPHERAL #3)
(AHB PERIPHERAL #2)
(AHB PERIPHERAL #1)
(AHB PERIPHERAL #126)
0xFFFF 4000
0xFFFF 0000
0xFFE1 0000
0xFFE0 C000
0xFFE0 8000
0xFFE0 4000
0xFFE0 0000

Table of Contents

Related product manuals