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Renesas HD6417641 - 25.3.13 USB Module Signal Timing; Figure 25.55 USB Clock Timing; Table 25.14 USB Module Clock Timing

Renesas HD6417641
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Section 25 Electrical Characteristics
Rev. 4.00 Sep. 14, 2005 Page 962 of 982
REJ09B0023-0400
25.3.13 USB Module Signal Timing
Table 25.14 USB Module Clock Timing
Conditions: V
CC
= 1.8 V ±5%, V
CC
Q = 3.0 V to 3.6 V, AV
CC
= 3.0 V to 3.6 V, V
SS
= V
SS
Q = AV
SS
= 0 V, Ta = 40°C to +85°C
Item Symbol Min. Max. Unit Figure(s)
Frequency (48 MHz) t
FREQ
47.9 48.1 MHz 25.55
Clock rising time t
RAS
4 ns
Clock falling time t
FAS
4 ns
Duty cycle (t
HIGH
/t
LOW
) t
DUTY
90 110 %
t
HIGH
t
LOW
t
FREQ
10%
t
RAS
t
FAS
90%
UCLK
Figure 25.55 USB Clock Timing

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