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Renesas HD6417641 - Table 19.8 SCSMR Settings and SCIF Communication Formats; Table 19.9 SCSMR and SCSCR Settings and SCIF Clock Source Selection

Renesas HD6417641
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Section 19 Serial Communication Interface with FIFO (SCIF)
Rev. 4.00 Sep. 14, 2005 Page 722 of 982
REJ09B0023-0400
Table 19.8 SCSMR Settings and SCIF Communication Formats
SCSMR Settings SCIF Communication Format
Bit 7
C/A
Bit 6
CHR
Bit 5
PE
Bit 3
STOP
Mode Data Length Parity Bit Stop Bit Length
0 0 0 0 8 bits Not set 1 bit
1 2 bits
1 0 Set 1 bit
1 2 bits
1 0 0 7 bits Not set 1 bit
1 2 bits
1 0 Set 1 bit
1
Asynchronous
2 bits
1 * * * Synchronous 8 bits Not set None
Note: *: Don't care
Table 19.9 SCSMR and SCSCR Settings and SCIF Clock Source Selection
SCSMR SCSCR
Settings
SCIF Transmit/Receive Clock
Bit 7
C/A
Bit 1
CKE1
Bit 0
CKE0
Mode
Clock
Source
SCK Pin Function
0 0 0 Internal SCIF does not use the SCK pin
1 Outputs a clock with a frequency 16 times
the bit rate
1 0
Asynchronous
External Inputs a clock with frequency 16 times the
bit rate
1 0 * Internal Outputs the serial clock
1 0
Synchronous
External Inputs the serial clock
Note: *: Don't care

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