Renesas HD6417641 - Table 23.8 Port G Data Register (PGDR) Read;Write Operations (PG13 DT to PG11 DT, PG8 DT); Table 23.9 Port G Data Register (PGDR) Read;Write Operations (PG10 DT to PG9 DT); Table 23.10 Port G Data Register (PGDR) Read;Write Operations (PG7 DT to PG0 DT)

Section 23 I/O Ports
Rev. 4.00 Sep. 14, 2005 Page 858 of 982
REJ09B0023-0400
Table 23.8 Port G Data Register (PGDR) Read/Write Operations (PG13DT to PG11DT,
PG8DT)
PGnMD2 PGnMD1 Pin State Read Write
0 0 Input Pin state Data is written to PGDR, but does not affect
pin state.
1 Output PGDR value Data is written to PGDR and the value is
output from the pin.
Other than above Reserved  
(n = 8, 11 to 13)
Table 23.9 Port G Data Register (PGDR) Read/Write Operations (PG10DT to PG9DT)
PGnMD2 PGnMD1 Pin State Read Write
0 0 Input Pin state Data is written to PGDR, but does not affect
pin state.
1 Output PGDR value Data is written to PGDR and the value is
output from the pin.
1 0 Reserved  
1 Other function Pin state Data is written to PGDR, but does not affect
pin state.
(n = 9, 10)
Table 23.10 Port G Data Register (PGDR) Read/Write Operations (PG7DT to PG0DT)
PGnMD2 Pin State Read Write
Input/other function
(The A/D converter is
used.)
Prohibited Prohibited 0
Input/other function
(The A/D converter is
not used.)
Pin state Ignored (does not affect pin state.)
1 Reserved  
(n = 0 to 7)