Renesas HD6417641 - Section 19.3.8, Bit Rate Register (SCBRR)

Section 19 Serial Communication Interface with FIFO (SCIF)
Rev. 4.00 Sep. 14, 2005 Page 694 of 982
REJ09B0023-0400
Bit Bit Name
Initial
value R/W Description
2  0 R Reserved
This bit is always read as 0. The write value should
always be 0.
1
0
CKS1
CKS0
0
0
R/W
R/W
Clock Select 1, 0
Select the internal clock source of the on-chip baud rate
generator. Four clock sources are available. Pφ, Pφ/4,
Pφ/16 and Pφ/64. For further information on the clock
source, bit rate register settings, and baud rate, see
section 19.3.8, Bit Rate Register (SCBRR).
00: Pφ
01: Pφ/4
10: Pφ/16
11: Pφ/64
Note: Pφ: Peripheral clock