Renesas HD6417641 - Table 19.4 Bit Rates and SCBRR Settings in Synchronous Mode

Section 19 Serial Communication Interface with FIFO (SCIF)
Rev. 4.00 Sep. 14, 2005 Page 711 of 982
REJ09B0023-0400
Table 19.4 Bit Rates and SCBRR Settings in Synchronous Mode
Pφ (MHz)
5 8 16 28.7 30 33
Bit Rate
(bits/s)
n N n N n N n N n N n N
110 — — — — — — — — — — — —
250 3 77 3 124 3 249 — — — — — —
500 3 38 2 249 3 124 3 223 3 233 3 255
1k 2 77 2 124 2 249 3 111 3 116 3 125
2.5k 1 124 1 199 2 99 2 178 2 187 2 200
5k 0 249 1 99 1 199 2 89 2 93 2 100
10k 0 124 0 199 1 99 1 178 1 187 1 200
25k 0 49 0 79 0 159 1 71 1 74 1 80
50k 0 24 0 39 0 79 0 143 0 149 0 160
100k — — 0 19 0 39 0 71 0 74 0 80
250k 0 4 0 7 0 15 — — 0 29 0 31
500k — — 0 3 0 7 — — 0 14 0 15
1M — — — — 0 3 — — — — 0 7
2M — — — — — — — — — —
[Legend]
Blank: No setting possible
—: Setting possible, but error occurs
Note: Set the BRR value that satisfies the external specifications.