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Renesas HD6417641 - A;D0, A;D1 Control Register (ADCR)

Renesas HD6417641
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Section 21 A/D Converter
Rev. 4.00 Sep. 14, 2005 Page 804 of 982
REJ09B0023-0400
Bit Bit Name
Initial
Value R/W Description
1
0
CH1
CH0
0
0
R/W
R/W
Channel Select
These bits and the MULTI bit select the analog input
channels. Clear the ADST bit to 0 before changing the
channel selection.
In the case of ADCSR0 (A/D0)
Single mode Multi mode or scan mode
00: AN0 AN0
01: AN1 AN0, AN1
10: AN2 AN0 to AN2
11: AN3 AN0 to AN3
In the case of ADSCR1 (A/D1)
Single mode Multi mode or scan mode
00: AN4 AN4
01: AN5 AN4, AN5
10: AN6 AN4 to AN6
11: AN7 AN4 to AN7
Note: * Clear this bit by writing 0.
21.2.3 A/D0, A/D1 Control Register (ADCR)
ADCR is a 16-bit readable/writable register that selects the simultaneous sampling of two
channels. See section 21.3.4 Simultaneous Sampling Operation, for details on simultaneous
sampling.
ADCR is initialized to H'0000 by a power-on reset and in standby mode.
Bit Bit Name
Initial
Value R/W Description
15 DSMP 0 R/W Selects A/D0 or A/D1 simultaneous sampling.
Starts simultaneous sampling of two channels when the
DSMP bit set to 1. The DSMP bit remains set to 1
during A/D conversion.
DSMP is automatically cleared to 0 when conversion
ends on all selected channels by each one mode.
Note: Set the ADCSR registers before DSMP bit set.
14 to 0 All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.

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