Renesas HD6417641 - Table 18.42 MTU Interrupts

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Section 18 Multi-Function Timer Pulse Unit (MTU)

Rev. 4.00 Sep. 14, 2005 Page 617 of 982

REJ09B0023-0400

Table 18.42 MTU Interrupts

Channel

Name

Interrupt Source

Interrupt

Flag

DMA

Activation

Priority

0 TGI0A TGRA_0 input capture/compare match TGFA_0 Possible High

TGI0B TGRB_0 input capture/compare match TGFB_0 Not possible

TGI0C TGRC_0 input capture/compare match TGFC_0 Not possible

TGI0D TGRD_0 input capture/compare match TGFD_0 Not possible

TCI0V TCNT_0 overflow TCFV_0 Not possible

1 TGI1A TGRA_1 input capture/compare match TGFA_1 Possible

TGI1B TGRB_1 input capture/compare match TGFB_1 Not possible

TCI1V TCNT_1 overflow TCFV_1 Not possible

TCI1U TCNT_1 underflow TCFU_1 Not possible

2 TGI2A TGRA_2 input capture/compare match TGFA_2 Possible

TGI2B TGRB_2 input capture/compare match TGFB_2 Not possible

TCI2V TCNT_2 overflow TCFV_2 Not possible

TCI2U TCNT_2 underflow TCFU_2 Not possible

3 TGI3A TGRA_3 input capture/compare match TGFA_3 Possible

TGI3B TGRB_3 input capture/compare match TGFB_3 Not possible

TGI3C TGRC_3 input capture/compare match TGFC_3 Not possible

TGI3D TGRD_3 input capture/compare match TGFD_3 Not possible

TCI3V TCNT_3 overflow TCFV_3 Not possible

4 TGI4A TGRA_4 input capture/compare match TGFA_4 Possible

TGI4B TGRB_4 input capture/compare match TGFB_4 Not possible

TGI4C TGRC_4 input capture/compare match TGFC_4 Not possible

TGI4D TGRD_4 input capture/compare match TGFD_4 Not possible

TCI4V TCNT_4 overflow/underflow TCFV_4 Not possible Low

Note: This table shows the initial state immediately after a reset. The relative channel priority can

be changed by the interrupt controller.

Input Capture/Compare Match Interrupt: An interrupt is requested if the TGIE bit in TIER is

set to 1 when the TGF flag in TSR is set to 1 by the occurrence of a TGR input capture/compare

match on a particular channel. The interrupt request is cleared by clearing the TGF flag to 0. The

MTU has 16 input capture/compare match interrupts, four each for channels 0, 3, and 4, and two

each for channels 1 and 2.

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