Renesas HD6417641 - Figure 18.58 Output Compare Output Timing (Complementary PWM Mode;Reset Synchronous PWM Mode); Figure 18.59 Input Capture Input Signal Timing

Section 18 Multi-Function Timer Pulse Unit (MTU)
Rev. 4.00 Sep. 14, 2005 Page 621 of 982
REJ09B0023-0400
Pφ
TCNT input
clock
TCNT
N
N+1
TGR
Compare
match signal
TIOC pin
N
Figure 18.58 Output Compare Output Timing
(Complementary PWM Mode/Reset Synchronous PWM Mode)
Input Capture Signal Timing: Figure 18.59 shows input capture signal timing.
TCNT
Input capture
input
N
N+1 N+2
N N+2
TGR
Input capture
signal
Pφ
Figure 18.59 Input Capture Input Signal Timing