Renesas HD6417641 - Port F; Figure 23.6 Port F; Table 23.5 Port E Data Register (PEDR) Read;Write Operations

Section 23 I/O Ports
Rev. 4.00 Sep. 14, 2005 Page 853 of 982
REJ09B0023-0400
Table 23.5 Port E Data Register (PEDR) Read/Write Operations
PEnMD2 PEnMD1 Pin State Read Write
0 0 Input Pin state Data is written to PEDR, but does not affect
pin state.
1 Output PEDR value Data is written to PEDR and the value is
output from the pin.
1 0 Reserved  
1 Other function Pin state Data is written to PEDR, but does not affect
pin state.
(n = 0 to 15)
23.6 Port F
Port F is a 16-bit input port with the pin configuration shown in figure 23.6. Each pin is controlled
by the port F control register (PFCR) in the PFC.
Port F
PTF15 (input/output)/POE3 (input)
PTF14 (input/output)/POE2 (input)
PTF13 (input/output)/POE1 (input)
PTF12 (input/output)/POE0 (input)
PTF11 (input/output)/TCLKA (input)
PTF10 (input/output)/TCLKB (input)
PTF9 (input/output)/TCLKC (input)
PTF8 (input/output)/TCLKD (input)
PTF7 (input/output)
PTF6 (input/output)
PTF5 (input/output)
PTF4 (input/output)
PTF3 (input/output)
PTF2 (input/output)
PTF1 (input/output)
PTF0 (input/output)
Figure 23.6 Port F