Renesas HD6417641 - Figure 16.19 Sample Flowchart for Master Receive Mode

Section 16 I
2
C Bus Interface 2 (IIC2)
Rev. 4.00 Sep. 14, 2005 Page 503 of 982
REJ09B0023-0400
No
Yes
RDRF=1 ?
No
Yes
RDRF=1 ?
Last receive
- 1?
Mater receive mode
Clear TEND in ICSR
Clear TRS in ICCR1 to 0
Clear TDRE in ICSR
Clear ACKBT in ICIER to 0
Dummy-read ICDRR
Read RDRF in ICSR
Read ICDRR
Set ACKBT in ICIER to 1
Set RCVD in ICCR1 to 1
Read ICDRR
Read RDRF in ICSR
Write 0 to BBSY
and SCP
Read STOP in ICSR
Read ICDRR
Clear RCVD in ICCR1 to 0
Clear MST in ICCR1 to 0
End
No
Yes
STOP=1 ?
No
Yes
[1] Clear TEND, select master receive mode, and then clear TDRE.
[2] Set acknowledge to the transmit device.
[3] Dummy-read ICDDR.
[4] Wait for 1 byte to be received
[5] Check whether it is the (last receive - 1).
[6] Read the receive data last.
[7] Set acknowledge of the final byte. Disable continuous reception (RCVD = 1).
[8] Read the (final byte - 1) of received data.
[9] Wait for the last byte to be receive.
[10] Clear the STOP flag.
[11] Issue the stop condition.
[12] Wait for the creation of stop condition.
[13] Read the last byte of receive data.
[14] Clear RCVD.
[15] Set slave receive mode.
[1]
[2]
[3]
[4]
[5]
[6]
Clear STOP in ICSR
[10]
[7]
[8]
[9]
[11]
[12]
[13]
[14]
[15]
Note: When the size of receive data is only one byte in reception, steps [2] to [6] are
skipped after step [1], before jumping to step [7]. The step [8] is dummy-read
in ICDRR.
However, when the size of receive data is two bytes and more, steps [2] to [6]
are not skipped after step [1].
Figure 16.19 Sample Flowchart for Master Receive Mode