Renesas HD6417641 - Page 72

Section 1 Overview
Rev. 4.00 Sep. 14, 2005 Page 22 of 828
REJ09B0023-0400
Classification Symbol I/O Name Function
TCLKA
TCLKB
TCLKC
TCLKD
I Clock input External clock input pins
TIOC0A
TIOC0B
TIOC0C
TIOC0D
I/O Input capture/
output compare
match
The TGRA_0 to TGRD_0 input
capture input/output compare
output/PWM output pins.
TIOC1A
TIOC1B
I/O Input capture/
output compare
match
The TGRA_1 to TGRB_1 input
capture input/output compare
output/PWM output pins.
Multi function timer-
pulse unit (MTU)
TIOC2A
TIOC2B
I/O Input capture/
output compare
match
The TGRA_2 to TGRB_2 input
capture input/output compare
output/PWM output pins.
TIOC3A
TIOC3B
TIOC3C
TIOC3D
I/O Input capture/
output compare
match
The TGRA_3 to TGRD_3 input
capture input/output compare
output/PWM output pins.
TIOC4A
TIOC4B
TIOC4C
TIOC4D
I/O Input capture/
output compare
The TGRA_4 to TGRB_4 input
capture input/output compare
output/PWM output pins
Port output enable
(POE)
POE3 to
POE0
I Port output
enable
Request signal input to set the high
current pins to the high impedance
status
SCK0
SCK1
SCK2
I/O Serial clock Clock input/output pins
RxD0
RxD1
RxD2
I Received data Data input pins
TxD0
TxD1
TxD2
O Transmitted data Data output pins
RTS0
RTS1
RTS2
I/O Request to send Request to send
Serial
communication
interface with FIFO
(SCIF)
CTS0
CTS1
CTS2
I/O Clear to send Clear to send