Segger J-Link - Configure SWO Output after Device Reset

J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG
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Syntax
-swofreq <SWOFreq>
Example
-swofreq 6000
3.8.3 Configure SWO output after device reset
In some situations it might happen that the target application is reset and it is
desired to log the SWO output of the target after reset during the booting process.
For such situations, the target application itself needs to initialize the CPU for SWO
output, since the SWO Viewer is not restarted but continuously running.
Example code for enabling SWO out of the target application
#define ITM_ENA (*(volatile unsigned int*)0xE0000E00) // ITM Enable
#define ITM_TPR (*(volatile unsigned int*)0xE0000E40) // Trace Privilege Register
#define ITM_TCR (*(volatile unsigned int*)0xE0000E80) // ITM Trace Control Reg.
#define ITM_LSR (*(volatile unsigned int*)0xE0000FB0) // ITM Lock Status Register
#define DHCSR (*(volatile unsigned int*)0xE000EDF0) // Debug register
#define DEMCR (*(volatile unsigned int*)0xE000EDFC) // Debug register
#define TPIU_ACPR (*(volatile unsigned int*)0xE0040010) // Async Clock \
// presacler register
#define TPIU_SPPR (*(volatile unsigned int*)0xE00400F0) // Selected Pin Protocol \
// Register
#define DWT_CTRL (*(volatile unsigned int*)0xE0001000) // DWT Control Register
#define FFCR (*(volatile unsigned int*)0xE0040304) // Formatter and flush \
// Control Register
U32 _ITMPort = 0; // The stimulus port from which SWO data is received and displayed.
U32 TargetDiv = 1;// Has to be calculated according to \
// the CPU speed and the output baud rate
static void _EnableSWO() {
U32 StimulusRegs;
//
// Enable access to SWO registers
//
DEMCR |= (1 << 24);
ITM_LSR = 0xC5ACCE55;
//
// Initially disable ITM and stimulus port
// To make sure that nothing is transferred via SWO
// when changing the SWO prescaler etc.
//
StimulusRegs = ITM_ENA;
StimulusRegs &= ~(1 << _ITMPort);
ITM_ENA = StimulusRegs; // Disable ITM stimulus port
ITM_TCR = 0; // Disable ITM
//
// Initialize SWO (prescaler, etc.)
//
TPIU_SPPR = 0x00000002; // Select NRZ mode
TPIU_ACPR = TargetDiv - 1; // Example: 72/48 = 1,5 MHz
ITM_TPR = 0x00000000;
DWT_CTRL = 0x400003FE;
FFCR = 0x00000100;
//
// Enable ITM and stimulus port
//
ITM_TCR = 0x1000D; // Enable ITM
ITM_ENA = StimulusRegs | (1 << _ITMPort); // Enable ITM stimulus port
}
3.8.4 Target example code for terminal output
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