280 CHAPTER 8 Monitor Mode Debugging
J-Link / J-Trace (UM08001) ©
2004-2017 SEGGER Microcontroller GmbH & Co. KG
8.8 Target application performs reset (Cortex-M)
For Cortex-M based target CPUs if the target application contains some code that
issues a reset (e.g. a watchdog reset), some special care needs to be taken regard-
ing breakpoints. In general, a target reset will leave the debug logic of the CPU
untouched meaning that breakpoints etc. are left intact, however monitior mode gets
disabled (bits in DEMCR get cleared). J-Link automatically restores the monitor bits
within a few microsenconds, after they have been detected as being cleared without
explicitly being cleared by J-Link.
However, there is a small window in which it can happen that a breakpoint is hit
before J-Link has restored the monitor bits. If this happens, instead of entering
debug mode, a HardFault is triggered. To avoid hanging of the application, a special
version of the HardFault_Handler is needed which detects if the reason for the Hard-
Fault was a breakpoint and if so, just ignores it and resumes execution of the target
application. A sample for such a HardFault handler can be downloaded from the SEG-
GER website: https://www.segger.com/downloads/appnotes
"Generic SEGGER Hard-
Fault handler".
To Next Page
Loading...
