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Segger J-Link - Frequently Asked Questions

Segger J-Link
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470 CHAPTER 20 Support and FAQs
J-Link / J-Trace (UM08001) ©
2004-2017 SEGGER Microcontroller GmbH & Co. KG
20.4 Frequently Asked Questions
Supported CPUs
Q: Which CPUs are supported?
A: J-Link / J-Trace should work with any ARM7/9 and Cortex-M3 core. For a list of
supported cores, see section
Supported CPU cores on page 48.
Converting data files
Q: I want to download my application into flash memory using J-Link Commander but
my application is a *.hex data file and J-Link Commander supports *.bin files only.
How do I download it?
A: Please use the J-Flash (which is part of the J-Link software and documentation
package) software to convert your *.hex/*.mot/... file to a *.bin file. For data file
conversion, no J-Flash license is necessary.
Using J-Link in my application
Q: I want to write my own application and use J-Link / J-Trace. Is this possible?
A: Yes. We offer a dedicated Software Developer Kit (SDK). See section
J-Link Soft-
ware Developer Kit (SDK)
on page 155 for further information.
Using DCC with J-Link
Q: Can I use J-Link / J-Trace to communicate with a running target via DCC?
A: Yes. The DLL includes functions to communicate via DCC on cores which support
DCC, such as ARM7/9/11, Cortex A/R series.
Read status of JTAG pins
Q: Can J-Link / J-Trace read back the status of the JTAG pins?
A: Yes, the status of all pins can be read. This includes the outputs of J-Link / J-Trace
as well as the supply voltage, which can be useful to detect hardware problems on
the target system.
J-Link support of ETM
Q: Does J-Link support the Embedded Trace Macrocell (ETM)?
A: No. ETM requires another connection to the ARM chip and a CPU with built-in ETM.
Most current ARM7 / ARM9 chips do not have ETM built-in.
J-Link support of ETB
Q: Does J-Link support the Embedded Trace Buffer (ETB)?
A: Yes. J-Link supports ETB. Most current ARM7 / ARM9 chips do not have ETB built-
in.
Registers on ARM 7 / ARM 9 targets
Q: I’m running J-Link.exe in parallel to my debugger, on an ARM 7 target. I can read
memory okay, but the processor registers are different. Is this normal?
A: If memory on an ARM 7/9 target is read or written the processor registers are
modified. When memory read or write operations are performed, J-Link preserves
the register values before they are modified. The register values shown in the
debugger’s register window are the preserved ones. If a second instance, in this
case
J-Link.exe, reads the processor registers, it reads the values from the hard-
ware, which are the modified ones. This is why it shows different register values.

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