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Segger J-Link - Tracing with On-Chip Trace Buffer

Segger J-Link
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J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG
379
14.3 Tracing with on-chip trace buffer
Some target CPUs provide trace functionality also provide an on-chip trace buffer
that is used to store the trace data output by the trace hardware unit on the device.
This allows to also do trace on such targets with a regular J-Link, as the on-chip trace
buffer can be read out via the regular debug interface J-Link uses to communicate
with the target CPU. Downside of this implementation is that it needs RAM on the tar-
get CPU that can be used as a trace buffer. This trace buffer is very limited (usually
between 1 and 4 KB) and reduces the RAM that can be used by the target application,
while tracing is done.
Note: Streaming trace is not possible with this trace implementation
14.3.1 CPUs that provide tracing via pins and on-chip buffer
Some CPUs provide a choice to either use the on-chip trace buffer for tracing (e.g.
when the trace pins are needed as GPIOs etc. or are not available on all packages of
the device).
For J-Link: The on-chip trace buffer is automatically used, as this is the only
method J-Link supports.
For J-Trace: By default, tracing via trace pins is used. If, for some reason, the
on-chip trace buffer shall be used instead, the J-Link software needs to be made
aware of this. The trace source can be selected via the
SelectTraceSource com-
mand string. For more information about the syntax this command string, please
refer to
Command strings on page 223. For more information about how to use
command strings in different environments, please refer to
Using command
strings
on page 241.

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