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Segger J-Link - Analog Devices

Segger J-Link
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384 CHAPTER 15 Device specifics
J-Link / J-Trace (UM08001) ©
2004-2017 SEGGER Microcontroller GmbH & Co. KG
15.1 Analog Devices
J-Link has been tested with the following MCUs from Analog Devices:
AD7160
ADuC7020x62
ADuC7021x32
ADuC7021x62
ADuC7022x32
ADuC7022x62
ADuC7024x62
ADuC7025x32
ADuC7025x62
ADuC7026x62
ADuC7027x62
ADuC7028x62
ADuC7030
ADuC7031
ADuC7032
ADuC7033
ADuC7034
ADuC7036
ADuC7038
ADuC7039
ADuC7060
ADuC7061
ADuC7062
ADuC7128
ADuC7129
ADuC7229x126
•ADuCRF02
ADuCRF101
15.1.1 ADuC7xxx
15.1.1.1 Software reset
A special reset strategy has been implemented for Analog Devices ADuC7xxx MCUs.
This special reset strategy is a software reset. "Software reset" means basically
RESET pin is used to perform the reset, the reset is initiated by writing special func-
tion registers via software.
The software reset for Analog Devices ADuC7xxxx executes the following sequence:
The CPU is halted
A software reset sequence is downloaded to RAM.
A breakpoint at address 0 is set
The software reset sequence is executed.
It is recommended to use this reset strategy. This sequence performs a reset of CPU
and peripherals and halts the CPU before executing instructions of the user program.
It is the recommended reset sequence for Analog Devices ADuC7xxx MCUs and works
with these devices only.
This information is applicable to the following devices:
Analog ADuC7020x62
Analog ADuC7021x32
Analog ADuC7021x62
Analog ADuC7022x32
Analog ADuC7022x62
Analog ADuC7024x62
Analog ADuC7025x32
Analog ADuC7025x62

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