Segger J-Link - Page 22

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J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG
12.3 Setup for various debuggers ....................................................................328
12.3.1 IAR Embedded Workbench IDE ................................................................328
12.3.2 ARM AXD (ARM Developer Suite, ADS)......................................................331
12.3.3 ARM RVDS (RealView developer suite) ......................................................333
12.3.4 GHS MULTI ...........................................................................................338
12.3.5 KEIL MDK (µVision IDE) ..........................................................................341
12.4 Configuration.........................................................................................344
12.4.1 Configuration file JLinkRDI.ini ..................................................................344
12.4.2 Using different configurations ..................................................................344
12.4.3 Using mutliple J-Links simulatenously .......................................................344
12.4.4 Configuration dialog ...............................................................................344
12.5 Semihosting ..........................................................................................353
12.5.1 Unexpected / unhandled SWIs .................................................................353
13 RTT............................................................................................................................355
13.1 Introduction ..........................................................................................356
13.2 How RTT works......................................................................................357
13.2.1 Target implementation............................................................................357
13.2.2 Locating the Control Block .......................................................................357
13.2.3 Internal structures .................................................................................357
13.2.4 Requirements ........................................................................................358
13.2.5 Performance..........................................................................................359
13.2.6 Memory footprint ...................................................................................359
13.3 RTT Communication ...............................................................................360
13.3.1 RTT Viewer............................................................................................360
13.3.2 RTT Client .............................................................................................360
13.3.3 RTT Logger............................................................................................360
13.3.4 RTT in other host applications ..................................................................360
13.4 Implementation .....................................................................................361
13.4.1 API functions .........................................................................................361
13.4.2 Configuration defines..............................................................................367
13.5 ARM Cortex - Background memory access .................................................369
13.6 Example code ........................................................................................370
13.7 FAQ......................................................................................................371
14 Trace..........................................................................................................................373
14.1 Introduction ..........................................................................................374
14.1.1 What is backtrace? .................................................................................374
14.1.2 What is streaming trace?.........................................................................374
14.1.3 What is code coverage? ..........................................................................374
14.1.4 What is code profiling?............................................................................375
14.2 Tracing via trace pins..............................................................................376
14.2.1 Cortex-M specifics ..................................................................................376
14.2.2 Trace signal timing .................................................................................376
14.2.3 Adjusting trace signal timing on J-Trace ....................................................376
14.2.4 J-Trace models with support for streaming trace ........................................378
14.3 Tracing with on-chip trace buffer ..............................................................379
14.3.1 CPUs that provide tracing via pins and on-chip buffer..................................379
14.4 Target devices with trace support .............................................................380
14.5 Streaming trace .....................................................................................381
14.5.1 Download and execution address differ .....................................................381
14.5.2 Do streaming trace without prior download................................................381
15 Device specifics .........................................................................................................383
15.1 Analog Devices ......................................................................................384
15.1.1 ADuC7xxx .............................................................................................384
15.2 ATMEL ..................................................................................................386
15.2.1 AT91SAM7 ............................................................................................387
15.2.2 AT91SAM9 ............................................................................................389
15.3 DSPGroup .............................................................................................390