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Segger J-Link - Page 44

Segger J-Link
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44 CHAPTER 1 Introduction
J-Link / J-Trace (UM08001) ©
2004-2017 SEGGER Microcontroller GmbH & Co. KG
1.3.9.3 Download speed
The following table lists performance values (Kbytes/s) for writing to memory (RAM):
The actual speed depends on various factors, such as JTAG, clock speed, host CPU
core etc.
1.3.9.4 Hardware versions
Version 2
Obsolete.
Version 3.1
Identical to version 2.0 with the following exceptions:
•Hi-Speed USB
Voltage range for trace signals extended to 1.2 - 3.3 V
Higher download speed
1.3.9.5 Software and Hardware Features Overview
For detailed information about hardware and software features of your J-Link/J-Trace
model and version see:
https://wiki.segger.com/Software_and_Hardware_Features_Overview
Clock rise time (T
rc
)
Max. 3ns
Clock fall time (T
fc
)
Max. 3ns
Trace Interface, Electrical
Power supply
USB powered
Max. 50mA + Target Supply current.
Target interface voltage (V
IF
)
1.2V ... 5V
Voltage interface low pulse (V
IL
) Max. 40% of V
IF
Voltage interface high pulse (V
IH
) Min. 60% of V
IF
Trace Interface, Timing
TRACECLK low pulse width (T
wl
)
Min. 2ns
TRACECLK high pulse width (T
wh
)
Min. 2ns
Data rise time (T
rd
)
Max. 3ns
Data fall time (T
fd
)
Max. 3ns
Clock rise time (T
rc
)
Max. 3ns
Clock fall time (T
fc
)
Max. 3ns
Data setup time (T
s
)
Min. 3ns
Data hold time (T
h
)
Min. 2ns
Hardware Cortex-M3
J-Trace for Cortex-M3 V2
190 Kbytes/s (12MHz SWD)
760 KB/s (12 MHz JTAG)
J-Trace for Cortex-M V3.1
190 Kbytes/s (12MHz SWD)
1440 KB/s (25 MHz JTAG)
Table 1.7: Download speed differences between hardware revisions
Table 1.6: J-Trace for Cortex-M3 specifications

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